On the synthesis of MVMT functions for PLA implementation using CCDs

Author

Abd-El-Barr, M.H. ; Choy, H.

Author_Institution

Dept. of Comput. Sci., Saskatchewan Univ., Saskatoon, Sask., Canada

fYear

1990

fDate

23-25 May 1990

Firstpage

316

Lastpage

323

Abstract

A new programmable logic array (PLA) for implementation of multivalued multithreshold (MVMT) functions using charge-coupled-device (CCD) technology is introduced. It is shown that the number of functions realized using the proposed structure is larger than those realized using the authors´ previously reported PLA structure. For example, all 256 four-valued three-threshold functions can be synthesized using only one column of the proposed PLA, as compared with two columns if the existing structure is used. This increase in functionality is achieved through increasing the number of gates per column from 8 to 12. The new structure exhibits the desirable feature of being dynamically reprogrammable at the user level by controlling the thresholds of the gates used. A synthesis procedure which can be used to synthesize MVMT functions for implementation using the proposed PLA is given

Keywords

charge-coupled device circuits; logic arrays; logic design; many-valued logics; 256 four-valued three-threshold functions; MVMT functions; PLA implementation; charge-coupled-device; dynamically reprogrammable; gates per column; multi-valued multi-threshold functions; programmable logic array; CMOS technology; Charge coupled devices; Circuit synthesis; Clocks; Frequency; Logic circuits; Multivalued logic; Potential well; Programmable logic arrays; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Multiple-Valued Logic, 1990., Proceedings of the Twentieth International Symposium on

Conference_Location

Charlotte, NC

Print_ISBN

0-8186-2046-3

Type

conf

DOI

10.1109/ISMVL.1990.122639

Filename

122639