Integrated design using SMT

The electronics manufacturing technique known as surface mount technology (SMT) is both a challenge and an opportunity to electrical and electronic academic programs. It is a challenge because lab-oriented EE and EET courses will be forced to use SMT as fewer and fewer parts will be available in traditional through-hole technology (THT). It is an opportunity because the proper use of SMT requires knowledge not only of electronics and/or software design, but also of printed circuit board layout issues, thermal properties, stress and strain, phase diagrams and test techniques. This means that SMT can be used as a vehicle to integrate the teaching of these topics for EE and EET students, providing encouragement for them to learn these topics. This paper discusses the manner in which these issues can be integrated in the academic environment, with consideration of both lecture and laboratory topics.