Design and optimization of hybrid decoupling scheme for charge pump circuit in non-volatile memory application

A high area efficiency hybrid decoupling scheme using both passive and active capacitors is designed to suppress the program noise of charge pump in non-volatile memory. Through the decoupling impedance analysis and noise power calculation, an optimized ratio between the passive and active capacitors is obtained to achieve maximum noise suppression performance. The proposed hybrid decoupling charge pump is fabricated in 0.18 μm technology with 1V supply voltage. The results show a nearly 20 dB noise-suppression-ratio (NSR) to the conventional method and the ripple voltage reduction is 73%. The area overhead is only 2%.