DocumentCode
1975311
Title
Pico-second time interval amplification
Author
Lin, Chin-Hsin ; Syrzycki, Marek
Author_Institution
Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
fYear
2010
fDate
22-23 Nov. 2010
Firstpage
201
Lastpage
204
Abstract
This paper presents a modified Delay Locked Loop (DLL) based Time Difference Amplifier (TDA) that utilizes a Dynamic-Logic Phase Frequency Detector (PFD). The zero dead-zone characteristic of the Dynamic-Logic PFD allows the DLL to eliminate phase error and maintain a stable gain for single picoseconds input time intervals. The TDA has been designed in 0.13μm CMOS technology. The simulation result demonstrates a linear transfer characteristic for an input time interval range from 0 to 90 ps and a gain shift less than 4.2% under ±10% supply voltage variation and temperature range from -40□ to 80□.
Keywords
CMOS analogue integrated circuits; delay lock loops; differential amplifiers; CMOS technology; delay locked loop; dynamic-logic phase frequency detector; linear transfer characteristic; phase error elimination; picosecond time interval amplification; size 0.13 mum; temperature -40 degC to 80 degC; time 0 ps to 90 ps; time difference amplifier; CMOS integrated circuits; Charge pumps; Delay; Logic gates; Phase frequency detector; Voltage control; DLL; Dynamic-Logic Phase Frequency Detector; Time Difference Amplifier; Zero Dead-Zone PFD;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2010 International
Conference_Location
Seoul
Print_ISBN
978-1-4244-8633-5
Type
conf
DOI
10.1109/SOCDC.2010.5682938
Filename
5682938
Link To Document