• DocumentCode
    1975509
  • Title

    Selectively patterned masks: Beyond structured ASIC

  • Author

    Baek, Donkyu ; Shin, Insup ; Paik, Seungwhun ; Shin, Youngsoo

  • Author_Institution
    Dept. of Electr. Eng., KAIST, Daejeon, South Korea
  • fYear
    2010
  • fDate
    22-23 Nov. 2010
  • Firstpage
    154
  • Lastpage
    157
  • Abstract
    Conventional structured ASIC still suffers from large delay and area due to the use of homogeneous array of tiles. We propose a new lithography method called selectively patterned masks (SPM), which enables more than one type of tiles to be used in structured ASIC. This structured ASIC using mixture of different tiles relaxes regularity. To assess SPM concept, A new structured ASIC is proposed; tile and routing architecture, and routing algorithm are all addressed. Experiment results using 45-nm technology show that proposed concept can push the limit of structured ASIC closer to traditional ASIC.
  • Keywords
    application specific integrated circuits; masks; photolithography; homogeneous array; lithography method; routing algorithm; routing architecture; selectively patterned masks; size 45 nm; structured ASIC; Application specific integrated circuits; Arrays; Delay; Logic gates; Metals; Routing; Tiles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SoC Design Conference (ISOCC), 2010 International
  • Conference_Location
    Seoul
  • Print_ISBN
    978-1-4244-8633-5
  • Type

    conf

  • DOI
    10.1109/SOCDC.2010.5682950
  • Filename
    5682950