Title :
A technique for fast calculations of capacitance matrices of interconnect structures
Author :
Veremey, Vladimir ; Mittra, Raj
Author_Institution :
Electromagn. Commun. Res. Lab., Pennsylvania State Univ., University Park, PA, USA
Abstract :
A finite difference (FD) method for rapid and accurate evaluation of capacitance matrices of interconnect configurations is described. Novel techniques for the truncation of FD mesh, that significantly reduce the CPU time, are presented.
Keywords :
capacitance; finite difference methods; integrated circuit interconnections; integrated circuit packaging; matrix algebra; CPU time reduction; capacitance matrices; fast calculations; finite difference method; interconnect structures; mesh truncation; Boundary element methods; Capacitance; Circuits; Delay estimation; Dielectrics; Finite difference methods; Packaging; Parameter extraction; Time domain analysis;
Conference_Titel :
Electrical Performance of Electronic Packaging, 1997., IEEE 6th Topical Meeting on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-8649-3
DOI :
10.1109/EPEP.1997.634081
