Noise management in highly heterogeneous SoC based integrated circuits

Noise coupling is one of the most fundamental issues in the design of highly heterogeneous, robust integrated systems. A two-step noise management methodology is proposed in this paper. In the first step, a methodology is described to efficiently analyze noise coupling in large scale circuits while maintaining sufficient accuracy. The second step consists of a methodology to significantly mitigate switching noise. The first step helps determining the required signal isolation and the efficacy of the noise reduction technique proposed in the second step. The two primary noise coupling paths in hybrid systems utilizing three dimensional (3-D) integration technology are also identified.