DocumentCode :
1976809
Title :
Noise improvement of 3–5GHz CMOS UWB LNA
Author :
Li, Chia-Chien ; Chen, Yi-Chen ; Yang, Jeng-Rern
Author_Institution :
Dept. of Commun. Eng., Yuan Ze Univ., Jhongli, Taiwan
fYear :
2010
fDate :
7-9 Dec. 2010
Firstpage :
1
Lastpage :
4
Abstract :
A single inductor matching network that carried low noise is designed to achieve the input wideband matching. This way has lower complexity that reduces chip area and holds the good reflection coefficient. Besides, the current reuse technique was used to achieve low power consumption. The design is simulated by Taiwan Semiconductor Manufacturing Company (TSMC) 0.18μm RF CMOS process. Through a 1V/5.56mA supply, The measurement results show that the LNA achieved the maximum gain of 14.5dB with gain flatness ± 0.35dB; input return loss lower than -10dB; and a minimum noise figure 2.9dB in 3~5 GHz.
Keywords :
CMOS integrated circuits; low noise amplifiers; microwave amplifiers; microwave integrated circuits; RF CMOS process; Taiwan Semiconductor Manufacturing Company; UWB LNA; current 5.56 mA; current reuse technique; frequency 3 GHz to 5 GHz; gain -0.35 dB; gain 0.35 dB; gain 14.5 dB; low power consumption; noise figure 2.9 dB; noise improvement; single inductor matching network; size 0.18 mum; voltage 1 V; wideband matching; Frequency measurement; Gain measurement; Impedance matching; Noise figure; Power measurement; Semiconductor device measurement; LNA; UWB; low power;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Design of Advanced Packaging & Systems Symposium (EDAPS), 2010 IEEE
Conference_Location :
Singapore
ISSN :
2151-1225
Print_ISBN :
978-1-4244-9068-4
Electronic_ISBN :
2151-1225
Type :
conf
DOI :
10.1109/EDAPS.2010.5683009
Filename :
5683009
Link To Document :
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