• DocumentCode
    1976812
  • Title

    Development of Model Checker of Dynamic Linear Hybrid Automata

  • Author

    Yanase, Ryo ; Sakai, Tadashi ; Sakai, Masayuki ; Yamane, Satoshi

  • Author_Institution
    Grad. Sch. of Natural Sci. & Technol., Kanazawa Univ., Kanazawa, Japan
  • fYear
    2013
  • fDate
    22-26 July 2013
  • Firstpage
    607
  • Lastpage
    608
  • Abstract
    Dynamically reconfigurable systems have attracted public attention from the point of view of miniaturization and saving power consumption for embedded systems in recent years. In this study, we propose dynamic linear hybrid automata as specification language of dynamically reconfigurable systems and the verification technique of reachability analysis. A dynamic linear hybrid automaton(DLHA) is a linear hybrid automaton extended with actions of creation and destruction. This paper presents the model checker and applies it to the model of an embedded system consisting CPU and DRP.
  • Keywords
    automata theory; embedded systems; formal verification; reachability analysis; specification languages; CPU; DLHA; DRP; dynamic linear hybrid automata; embedded systems; model checker; power consumption; reachability analysis; specification language; verification technique; Automata; Computational modeling; Educational institutions; Embedded systems; Program processors; Writing; dynamically reconfigurable systems; hybrid automata; model checking; verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Software and Applications Conference (COMPSAC), 2013 IEEE 37th Annual
  • Conference_Location
    Kyoto
  • Type

    conf

  • DOI
    10.1109/COMPSAC.2013.98
  • Filename
    6649888