On the use of nanoelectronic logic cells based on metallic Single Electron Transistors

Author

Bounouar, Mohamed Amine ; Beaumont, Arnaud ; Calmon, Francis ; Drouin, Dominique

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Sherbrooke, Sherbrooke, QC, Canada

fYear

2012

fDate

6-7 March 2012

Firstpage

157

Lastpage

160

Abstract

Single Electron Transistors have the potential to be a very promising candidate for future computing architectures due to their low voltage operation and low power consumption. In this paper, for the first time, logic cells based on metallic SET operating at room temperature and up to 125 °C were designed. An evaluation of the energy consumption and a comparison with their equivalents in CMOS technology has been made. Based on results using accurate SET model, SET-based logic cells provide a significant consumption reduction as compared with their CMOS counterparts.

Keywords

CMOS logic circuits; MOSFET; integrated circuit design; logic design; low-power electronics; nanoelectronics; single electron transistors; CMOS technology; computing architecture; energy consumption evaluation; low power consumption; low voltage operation; metallic SET; metallic single electron transistor; nanoelectronic logic cell; temperature 293 K to 298 K; CMOS integrated circuits; CMOS technology; Computer architecture; Integrated circuit modeling; Logic gates; Power demand; Semiconductor device modeling; Hybrid SET-CMOS architectures; Low power consumption; Metallic Single Electron Transistor (SET); Nanoelectronic logic cells; Room Temperature Operation;

fLanguage

English

Publisher

ieee

Conference_Titel

Ultimate Integration on Silicon (ULIS), 2012 13th International Conference on

Conference_Location

Grenoble

Print_ISBN

978-1-4673-0191-6

Electronic_ISBN

978-1-4673-0190-9

Type

conf

DOI

10.1109/ULIS.2012.6193381

Filename

6193381