A low power low phase noise fractional-N synthesizer with linearization and mismatch noise shaping techniques for sub-GHz multi-band transceiver with narrow channel spacing

Author

Blank, Theodore R. ; Roine, Per T. ; Marienborg, Jan T. ; Chakraborty, Sudipto ; Ackermann, Joerg ; Coleman, Edward P. ; Zolnier, Joel A. ; Bulla, C. ; Kristoffersen, P. ; Budziak, W.A. ; Seem, Patrick ; Faison, Kevin ; Kallerud, Torjus ; Nettum, Arne ; Y

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

2012

fDate

17-21 Sept. 2012

Firstpage

197

Lastpage

200

Abstract

A fractional-N frequency synthesizer with a linearized phase-frequency detector and noise shaping of phase mismatch is presented. These techniques lead to spurious free operation over a wide frequency range (133-960M), and 15dB close in phase noise improvement. The core PLL consumes 15mW in 180nm CMOS and provides phase noise better than -94dBc/Hz@1kHz from a 924MHz carrier.

Keywords

CMOS integrated circuits; channel spacing; linearisation techniques; phase locked loops; phase noise; radiocommunication; sensors; transceivers; CMOS; core PLL; fractional-N frequency synthesizer; frequency 924 MHz; linearization shaping techniques; linearized phase-frequency detector; low power low phase noise fractional-N synthesizer; mismatch noise shaping techniques; narrow channel spacing; noise figure 15 dB; phase mismatch; phase noise improvement; power 15 mW; size 180 nm; spurious free operation; sub-GHz multiband transceiver; Charge pumps; Noise shaping; Phase frequency detector; Phase locked loops; Phase noise; Quantization; Voltage-controlled oscillators; Fractional N PLL; Linearized PFD; Multi-band; low-power; multi-band; narrow channel spacing; phase mismatch;

fLanguage

English

Publisher

ieee

Conference_Titel

ESSCIRC (ESSCIRC), 2012 Proceedings of the

Conference_Location

Bordeaux

ISSN

1930-8833

Print_ISBN

978-1-4673-2212-6

Electronic_ISBN

1930-8833

Type

conf

DOI

10.1109/ESSCIRC.2012.6341292

Filename

6341292