DocumentCode
1980623
Title
Towards minimizing read time for NAND flash
Author
Peleato, B. ; Agarwal, Rohit ; Cioffi, John ; Minghai Qin ; SIEGEL, Peter H.
Author_Institution
Stanford Univ., Stanford, CA, USA
fYear
2012
fDate
3-7 Dec. 2012
Firstpage
3219
Lastpage
3224
Abstract
On NAND flash, a primary source of increased read time comes from the fact that in the presence of noise, the flash medium must be read several times using different read threshold voltages to find the optimal read location, which minimizes bit-error-rate. This paper proposes an algorithm to estimate the optimal read threshold in a fast manner using a limited number of re-reads. Then it derives an expression for the resulting BER in terms of the minimum possible BER. It is also shown that minimizing BER and minimizing codeword-error-rate are competing objectives in the presence of a limited number of allowed re-reads, and a tradeoff between the two is proposed.
Keywords
NAND circuits; error statistics; flash memories; NAND flash; bit-error-rate; codeword-error-rate; optimal read location; read time;
fLanguage
English
Publisher
ieee
Conference_Titel
Global Communications Conference (GLOBECOM), 2012 IEEE
Conference_Location
Anaheim, CA
ISSN
1930-529X
Print_ISBN
978-1-4673-0920-2
Electronic_ISBN
1930-529X
Type
conf
DOI
10.1109/GLOCOM.2012.6503610
Filename
6503610
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