• DocumentCode
    1981010
  • Title

    Automatic abstraction for worst-case analysis of discrete systems

  • Author

    Balarin, Felice

  • Author_Institution
    Cadence Berkeley Labs., CA, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    494
  • Lastpage
    501
  • Abstract
    Recently a methodology for worst-case analysis of discrete systems has been proposed by the author. The methodology relies on a user-provided abstraction of system components. In this paper the author proposes a procedure to automatically generate such abstractions for system components with Boolean transition functions. She use a binary decision diagram (BDD) of the transition function to generate a formula in Presburger arithmetic representing the desired abstraction. The author´s experiments indicate that the approach can be applied to control-dominated embedded systems
  • Keywords
    binary decision diagrams; computer aided analysis; discrete systems; electrical engineering computing; embedded systems; timing; BDD; Boolean transition functions; Presburger arithmetic; automatic abstraction; binary decision diagram; control-dominated embedded systems; discrete systems; worst-case analysis; Arithmetic; Automatic control; Binary decision diagrams; Boolean functions; Control systems; Data structures; Embedded system; Laboratories; Law; Legal factors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
  • Conference_Location
    Paris
  • Print_ISBN
    0-7695-0537-6
  • Type

    conf

  • DOI
    10.1109/DATE.2000.840830
  • Filename
    840830