DocumentCode :
1981186
Title :
Comparative analysis in the implementation of subtraction and thresholding for digital image processing
Author :
Lujan, C.A. ; Mora, F.J. ; Atoche, J.R.
Author_Institution :
Dept. of Electr. & Electron. Eng., Inst. Tecnol. de Merida, Merida, Mexico
fYear :
2008
fDate :
12-14 Nov. 2008
Firstpage :
465
Lastpage :
469
Abstract :
The aim of this work is to demonstrate the advantages and disadvantages of different ways of implementing subtraction and thresholding in the processing of digital images. The four different systems will be analysed: first in a PC computer with a Borland C++ program, second with an embedded microprocessor programmed in C++, third with a DSP also programmed in C++, and finally with a hardware designed in VHDL.
Keywords :
digital signal processing chips; field programmable gate arrays; image processing; Borland C++ program; FPGA; VHDL; digital image processing; embedded microprocessor; subtraction; thresholding; Automatic control; Digital images; Digital signal processing; Embedded computing; Field programmable gate arrays; Hardware; Image analysis; Image processing; Microprocessors; Object detection; DSPs; FPGAs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Engineering, Computing Science and Automatic Control, 2008. CCE 2008. 5th International Conference on
Conference_Location :
Mexico City
Print_ISBN :
978-1-4244-2498-6
Electronic_ISBN :
978-1-4244-2499-3
Type :
conf
DOI :
10.1109/ICEEE.2008.4723396
Filename :
4723396
Link To Document :
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