DocumentCode :
1981904
Title :
Structural testing on real boards
Author :
Bach, Peter ; Bosch, Michael
Author_Institution :
Univ. des Saarlandes, Germany
fYear :
2000
fDate :
2000
Firstpage :
741
Abstract :
Summary form only given. For structural interconnect testing a graph is generated from the physical layout of the interconnects. The vertices are then colored. The number of colors determines the number of different serial test patterns needed. Based on real PCB layout data, we give experimental results that show how the choice of the graph generation method and of the coloring algorithm influence the number of colors
Keywords :
graph colouring; interconnections; printed circuit testing; PCB layout data; coloring algorithm; graph generation method; physical layout; serial test patterns; structural interconnect testing; Concurrent computing; Electrical capacitance tomography; Euclidean distance; Soldering; Testing; Web pages; World Wide Web;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-0537-6
Type :
conf
DOI :
10.1109/DATE.2000.840874
Filename :
840874
Link To Document :
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