An FPGA controller for the image transceiver device

A CMOS liquid crystal based image transceiver device (ITD) is under development at both the Holon Institute of Technology and Ben Gurion University. This device. as its name suggests, both receives and displays images by using a dual-function array of imager and display elements. An FPGA controller chip is under development for this chip. The uniqueness of this controller is its capability to control both the imaging and the display functions of the ITD chip. The FPGA controller, based on the Xilinx Virtex II architecture, allows the ITD array to perform real time vision modes of image capture, image display, as well as image superposition and its display. In addition, the chip is designed to control the ADC and DAC circuits of the ITD chip so as to allow data transfer between the ITD chip and an external computer for subsequent processing. In this work the FPGA controller as well as the ITD system and its associated control units, are described.