Title :
Partial Expansion Graphs: Exposing Parallelism and Dynamic Scheduling Opportunities for DSP Applications
Author :
Zaki, George F. ; Plishker, William ; Bhattacharyya, Shuvra S. ; Fruth, Frank
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Maryland Coll. Park, College Park, MD, USA
Abstract :
Emerging Digital Signal Processing (DSP) algorithms and wireless communications protocols require dynamic adaptation and online reconfiguration for the implemented systems at runtime. In this paper, we introduce the concept of Partial Expansion Graphs (PEGs) as an implementation model and associated class of scheduling strategies. PEGs are designed to help realize DSP systems in terms of forms and granularities of parallelism that are well matched to the given applications and targeted platforms. PEGs also facilitate derivation of both static and dynamic scheduling techniques,depending on the amount of variability in task execution times and other operating conditions. We show how to implement efficient PEG-based scheduling methods using real time operating systems, and to re-use pre-optimized libraries of DSP components within such implementations. Empirical results show that the PEG strategy can 1) achieve significant speedups on a state of the art multicore signal processor platform for static dataflow applications with predictable execution times,and 2) exceed classical scheduling speedups for application shaving execution times that can vary dynamically. This ability to handle variable execution times is especially useful as DSP applications and platforms increase in complexity and adaptive behavior, thereby reducing execution time predictability.
Keywords :
protocols; radio networks; signal processing; DSP applications; DSP components; PEG; digital signal processing; dynamic adaptation; dynamic scheduling opportunities; dynamic scheduling techniques; exposing parallelism; online reconfiguration; partial expansion graphs; real time operating systems; wireless communications protocols; Digital signal processing; Dynamic scheduling; Multicore processing; Processor scheduling; Program processors; Schedules; Data?ow Graphs; Digital Signal Processing; Multiprocessor Dynamic Scheduling;
Conference_Titel :
Application-Specific Systems, Architectures and Processors (ASAP), 2012 IEEE 23rd International Conference on
Conference_Location :
Delft
Print_ISBN :
978-1-4673-2243-0
Electronic_ISBN :
2160-0511
DOI :
10.1109/ASAP.2012.14