DocumentCode
1983592
Title
Non-linear circuit effects on analog VLSI neural network implementations
Author
Onorato, M. ; Valle, M. ; Caviglia, D.D. ; Bisio, G.M.
Author_Institution
Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy
fYear
1994
fDate
26-28 Sep 1994
Firstpage
430
Lastpage
438
Abstract
We present an analog VLSI neural network for texture analysis; in particular we show that the filtering block, which is the most critical block of the architecture for precision of computation, can be implemented using simple and compact analog circuits, without significant loss in classification performance. Through an accurate analysis of the circuits it is possible to model the real circuit characteristics in the software simulation environment; the weights calculated in the learning phase (which is performed off-line using the adaptive simulated annealing algorithm), can be properly coded into analog circuit variables in order to implement the correct operation of the network
Keywords
analogue multipliers; adaptive simulated annealing algorithm; analog VLSI neural network; analog circuit variables; circuit characteristics modeling; classification performance; filtering block; learning phase; software simulation environment; surface defect detection; synaptic multiplier model; texture analysis; Analog circuits; Analog computers; Analytical models; Circuit analysis computing; Circuit simulation; Computer architecture; Filtering; Neural networks; Performance analysis; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics for Neural Networks and Fuzzy Systems, 1994., Proceedings of the Fourth International Conference on
Conference_Location
Turin
Print_ISBN
0-8186-6710-9
Type
conf
DOI
10.1109/ICMNN.1994.593739
Filename
593739
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