Novel Application of Genetic Sequencing Algorithms to Optimization of Hardware Resource Sharing for DSP

Author

McKeown, S. ; Woods, R.

Author_Institution

CapnaDSP Ltd., Belfast, UK

fYear

2012

fDate

9-11 July 2012

Firstpage

169

Lastpage

172

Abstract

Field programmable gate array (FPGA) technology is a powerful platform for implementing computationally complex, digital signal processing (DSP) systems. Applications that are multi-modal, however, are designed for worse case conditions. In this paper, genetic sequencing techniques are applied to give a more sophisticated decomposition of the algorithmic variations, thus allowing an unified hardware architecture which gives a 10-25% area saving and 15% power saving for a digital radar receiver.

Keywords

digital signal processing chips; field programmable gate arrays; radar receivers; DSP; digital radar receiver; digital signal processing system; field programmable gate array technology; genetic sequencing algorithm; genetic sequencing technique; hardware resource sharing optimization; unified hardware architecture; Algorithm design and analysis; Arrays; Clustering algorithms; Digital signal processing; Peer to peer computing; Signal processing algorithms; Transforms; DSP; FFT; FPGA; algorithm design; sequencing;

fLanguage

English

Publisher

ieee

Conference_Titel

Application-Specific Systems, Architectures and Processors (ASAP), 2012 IEEE 23rd International Conference on

Conference_Location

Delft

ISSN

2160-0511

Print_ISBN

978-1-4673-2243-0

Electronic_ISBN

2160-0511

Type

conf

DOI

10.1109/ASAP.2012.15

Filename

6341470