DocumentCode
1984612
Title
Design of a parallel neural processor
Author
De La Roca, B. Mila ; Randon, E.
Author_Institution
Univ. Simon Bolivar, Caracas, Venezuela
fYear
1998
fDate
2-4 Mar 1998
Firstpage
109
Lastpage
112
Abstract
The goal of this work is to design a neural processor that compute in a efficient way a Feed-Forward Neural Network. It was accomplished by the design of an optimized product-sum architecture and a microcontroller based on the data flow theory. The architecture proposed is faster than some computer implementations like MatLab(R) 4.2. Neural Network Toolbox and language “C” program
Keywords
data flow computing; feedforward neural nets; microcontrollers; neural chips; neural net architecture; parallel architectures; data flow theory; design; feedforward neural network; microcontroller; parallel neural processor; product-sum architecture; Computer architecture; Computer networks; Design optimization; Equations; Feedforward neural networks; Feedforward systems; Integrated circuit interconnections; Microcontrollers; Neural networks; Neurons;
fLanguage
English
Publisher
ieee
Conference_Titel
Devices, Circuits and Systems, 1998. Proceedings of the 1998 Second IEEE International Caracas Conference on
Conference_Location
Isla de Margarita
Print_ISBN
0-7803-4434-0
Type
conf
DOI
10.1109/ICCDCS.1998.705817
Filename
705817
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