DocumentCode
1984888
Title
Performance evaluation of the μ BTRON bus
Author
Tanaka, Katsuya ; Shimizu, Yasuyuki ; Tamai, Kazushi ; Tsunoda, Shigeo ; Kato, Hiro
Author_Institution
Electron. D&D Center, Yamaha Corp., Shizuoka, Japan
fYear
1992
fDate
2-4 Dec 1992
Firstpage
40
Lastpage
45
Abstract
The μBTRON bus is a simp yet fast LAN, used to connect electronic stationery goods to the BTRON workstations. The specifications of the μBTRON bus feature fast real-time performance with the ability to transfer blocks of mass data at reasonably high speed, and cost effectiveness. Yamaha has developed the LSI, called CML2, to implement the μBTRON bus specifications. In order to confirm whether the CML2 met the expected performance requirements of the μBTRON bus, a series of tests were made and the performance parameters were actually measured. In the tests, the CML2 was built on a VME board, where 68000 MPU controlled the CML2 LSI as well as carrying out some on board test programs. The result showed that CML2´s performance sufficiently met the original expectation of the μBTRON bus specifications by achieving a data transfer rate of up to 386 Kbytes per second, or a frame transfer rate of 10490 frames per second maximum
Keywords
formal specification; local area networks; performance evaluation; peripheral interfaces; standards; 68000 MPU; BTRON workstations; CML2; LSI; VME board; data transfer rate; electronic pens; electronic stationery goods; fast LAN; fast real-time performance; keyboards; mu BTRON bus; performance requirements; peripheral devices; printers; Manufacturing automation;
fLanguage
English
Publisher
ieee
Conference_Titel
TRON Project Symposium, 1992. Proceedings., Ninth
Conference_Location
Tokyo
ISSN
1063-6749
Print_ISBN
0-8186-2990-8
Type
conf
DOI
10.1109/TRON.1992.313270
Filename
313270
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