Performance analysis of fixed, reconfigurable, and custom architectures for the SCAN image and video encryption algorithm

Author

Dollas, Apostolos ; Kachris, Christopher ; Bourbakis, Nikolaos

Author_Institution

Dept. of Electron. & Comput. Eng., Tech. Univ. of Crete, Chania, Greece

fYear

2003

fDate

9-11 April 2003

Firstpage

19

Lastpage

28

Abstract

This paper briefly presents a block cipher encryption architecture and a reconfigurable logic-based hardware design for the SCAN encryption algorithm. Detailed performance results are presented for still images as well as video, and the reconfigurable architecture is compared to software-only implementations of the same algorithm as well as a preliminary ASIC design.

Keywords

cryptography; field programmable gate arrays; reconfigurable architectures; software performance evaluation; video coding; FPGA; SCAN algorithm; block cipher encryption; custom architecture; field programmable gate array; hardware design; image encryption; performance analysis; reconfigurable architecture; reconfigurable logic; video encryption; Algorithm design and analysis; Application specific integrated circuits; Computer architecture; Cryptography; Hardware; NIST; Performance analysis; Reconfigurable architectures; Reconfigurable logic; Software algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Custom Computing Machines, 2003. FCCM 2003. 11th Annual IEEE Symposium on

Print_ISBN

0-7695-1979-2

Type

conf

DOI

10.1109/FPGA.2003.1227238

Filename

1227238