DocumentCode :
1985703
Title :
An optical configuration acceleration method using negative logic implementation
Author :
Moriwaki, Retsu ; Watanabe, Minoru
Author_Institution :
Electr. & Electron. Eng., Shizuoka Univ., Hamamatsu, Japan
fYear :
2009
fDate :
22-24 Dec. 2009
Firstpage :
552
Lastpage :
555
Abstract :
Up to now, as one of multi-context devices, an optically reconfigurable gate array (ORGA) has been developed to achieve high-speed reconfiguration. Since quick context switching allows implementation of many functions onto a gate array without idle time, fast reconfiguration is extremely important for multi-context devices. In ORGAs, the easiest way to increase the reconfiguration frequency is to use high-power lasers. However, such high-power lasers increase power consumption and package size. In the worst case, they might require a cooling system. For that reason, this paper proposes a negative logic implementation method by which optical configurations can be accelerated without ORGA architecture modification and any increase of laser power. This time, the method was demonstrated on a dynamic optically reconfigurable gate array architecture. Based on the experimental results, this paper clarifies the acceleration method´s effectiveness.
Keywords :
optical logic; optical switches; context switching; high-power lasers; high-speed reconfiguration; multi-context devices; negative logic implementation; optical configuration acceleration method; optically reconfigurable gate array; Acceleration; Energy consumption; Frequency; High speed optical techniques; Logic devices; Optical arrays; Optical devices; Power lasers; Reconfigurable logic; Ultraviolet sources;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Trends in Electronic and Photonic Devices & Systems, 2009. ELECTRO '09. International Conference on
Conference_Location :
Varanasi
Print_ISBN :
978-1-4244-4846-3
Type :
conf
DOI :
10.1109/ELECTRO.2009.5441043
Filename :
5441043
Link To Document :
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