DocumentCode :
1985998
Title :
Aliasing-free error detection (ALFRED)
Author :
Chakrabarty, Krishnendu ; Hayes, John P.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fYear :
1993
fDate :
6-8 April 1993
Firstpage :
260
Lastpage :
266
Abstract :
Aliasing, which is the mapping of a faulty circuit´s signature onto the fault-free signature, is a major problem in signature analysis. The authors present a new design technique (ALFRED) for zero aliasing based on the concept of sequence detection. For a test sequence of length n, the length of the signature in ALFRED is Theta (log n). The authors reduce the circuit complexity by adopting a shift-register-like structure that minimizes the logical dependencies of all but one of the flip-flops. They relate the theory of balanced functions to ALFRED, and demonstrate the feasibility of the approach by using it to design a signature analyzer for a carry-lookahead adder.<>
Keywords :
adders; carry logic; flip-flops; logic testing; shift registers; ALFRED; balanced functions; carry-lookahead adder; circuit complexity; sequence detection; shift-register-like structure; signature analysis; test sequence; zero aliasing; Automatic testing; Circuit faults; Circuit testing; Complexity theory; Computer architecture; Computer errors; Flip-flops; Hardware; Laboratories; Polynomials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-8186-3830-3
Type :
conf
DOI :
10.1109/VTEST.1993.313356
Filename :
313356
Link To Document :
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