Two new Schmitt trigger circuits based on current sink and current source inverters

This paper presents two new Schmitt trigger circuits with eight enhancement-type MOS transistors are introduced in this paper. These two Schmitt trigger circuits are implemented based on current sink and current source inverters. The hysteresis curves of the proposed Schmitt triggers are presented, hysteresis width depends on the supply voltage and transistor geometry. These circuits are preferred for high speed applications and also useful in low power applications. The performances of proposed circuits are examined using Cadence and model parameters of 180 nm CMOS technology with supply rail voltage of +3V. The simulation results and layouts are presented with optimized sizing and spacing in compliance to the design rules of gpdk 180 nm CMOS process.