DocumentCode
1986233
Title
A Holistic Model for Mobility Enhancement through Process-Induced Stress
fYear
2005
fDate
19-21 Dec. 2005
Firstpage
43
Lastpage
46
Abstract
A compact and scaleable holistic (non process-specifilc) model for mobility enhancement through process-induced stress is developed for the first time. The layout dependence of transistor m obility due to process-induced stress is efficiently captured. The mobility model is verified for different layout dimensions for several stress-inducing process technologies through both process simulations and experimental data.
Keywords
Charge carrier processes; Compressive stress; Effective mass; Electron mobility; Germanium silicon alloys; MOSFETs; Moore´s Law; Occupational stress; Silicon germanium; Tensile stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
Print_ISBN
0-7803-9339-2
Type
conf
DOI
10.1109/EDSSC.2005.1635201
Filename
1635201
Link To Document