DocumentCode :
1986271
Title :
Evaluation of test generation algorithms
Author :
Min, Yinghua ; Li, Zhongcheng
Author_Institution :
Inst. of Comput. Technol., Acad. Sinica, Beijing, China
fYear :
1993
fDate :
6-8 April 1993
Firstpage :
348
Lastpage :
350
Abstract :
Many ATPG algorithms are proposed every year. Evaluation of ATPG algorithms not only provides possibility to compare algorithms, but also predicts required computation resources for design and test of extra large circuits. The evaluation includes aspects of fault coverage, computation efficiency, and test set size. ISCAS 85 and ISCAS 89 benchmark circuits are available common examples for the evaluation. This paper presents a general methodology for the evaluation in spite of the difference of the computing environments that the algorithms run in. Eleven ATPG algorithms are evaluated, as a case study, based on the data of their experimental results published in the literature to show the feasibility and validation of the methodology presented.<>
Keywords :
automatic testing; computational complexity; fault location; logic testing; ATPG algorithms; benchmark circuits; computation efficiency; computation resources; fault coverage; test generation algorithms; test set size; validation; Automatic test pattern generation; Benchmark testing; Circuit faults; Circuit testing; Computers; Design automation; Fault detection; Fault tolerance; Prediction algorithms; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-8186-3830-3
Type :
conf
DOI :
10.1109/VTEST.1993.313376
Filename :
313376
Link To Document :
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