Digital and analog integrated-circuit design with built-in reliability

Author

Hsu, Wen-jay ; Sheu, Bing J. ; Tyree, Vance C.

Author_Institution

Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA

fYear

1989

fDate

2-4 Oct 1989

Firstpage

496

Lastpage

499

Abstract

A novel approach to the design of digital and analog VLSI with built-in reliability is presented. Physics-based reliability models for key failure mechanisms in VLSI circuits are used to achieve accurate and efficient circuit-level reliability prediction and improvement. A prototype integrated-circuit reliability simulator (RELY) and experimental results on hot-carrier damage and metal electromigration effects are presented

Keywords

VLSI; circuit CAD; circuit reliability; digital integrated circuits; electromigration; hot carriers; linear integrated circuits; RELY; VLSI circuits; analog VLSI; analog integrated-circuit design; built-in reliability; circuit-level reliability improvement; circuit-level reliability prediction; digital VLSI; digital integrated-circuit design; failure mechanisms; hot-carrier damage; integrated-circuit reliability simulator; metal electromigration effects; physics based reliability models; Circuit simulation; Circuit testing; Computational modeling; Computer simulation; Electromigration; Failure analysis; Integrated circuit reliability; Predictive models; Stress; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on

Conference_Location

Cambridge, MA

Print_ISBN

0-8186-1971-6

Type

conf

DOI

10.1109/ICCD.1989.63416

Filename

63416