Optimization and implementation of continuous time DSP-systems by using granularity reduction

Systems which perform digital signal processing in continuous-time are attractive for a number of applications like biomedical implants, hearing aids, remote sensors, telecommunications, and audio and speech processing. A main difference to sampled data systems is the realization of the delay elements which must be implemented as quasi-continuous time delay lines. Thus a large chip area is required for the delay elements which are also a critical point of these systems. Therefore in this paper a method will be presented which allows reducing the implementation costs and power consumption of these elements. This can be achieved by granularity reduction without sacrificing performance. Furthermore implementation aspects for an integrated solution will be covered.