DocumentCode :
1987202
Title :
A 1V 15-bit Audio ΔΣ ADC in 0.18µm CMOS
Author :
Liu, Liyuan ; Li, DongMei ; Chen, Liangdong ; Ye, Yafei ; Wang, ZhiHua
Author_Institution :
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
510
Lastpage :
513
Abstract :
In this paper a 1V 15-bit ΔΣ ADC for audio application is presented. Second order modulator with feed- forward path is adopted in order to reduce the swing of each integrator. Non-linear gain effect is mitigated. Single stage amplifier with high power efficiency is employed to save power. Decimation filter is implemented with seven-stage cascade sub- filters. Timing multiplexing and resource reuse methodology are employed for low hardware cost. The ADC is programmed to adapt 4K 8K 16K applications. Over 90dB SNDR performance can be achieved under various bandwidths while the total power dissipation is 360μW. The modulator occupies 0.3mm2 and decimation filter occupies 0.2mm2.
Keywords :
CMOS analogue integrated circuits; amplifiers; analogue-digital conversion; audio signal processing; delta-sigma modulation; ΔΣ ADC; CMOS; SNDR; audio application; cascade subfilter; decimation filter; feed-forward path; high power efficiency; nonlinear gain effect; power 360 muW; power dissipation; resource reuse methodology; second order modulator; single stage amplifier; size 0.18 micron; timing multiplexing; voltage 1 V; word length 15 bit; Bandwidth; CMOS integrated circuits; Capacitors; Modulation; Multiplexing; Noise; Quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
ISSN :
0271-4302
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
Type :
conf
DOI :
10.1109/ISCAS.2011.5937614
Filename :
5937614
Link To Document :
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