A 65nm CMOS current-mode receiver front-end

Author

Rodriguez, S. ; Rusu, A.

Author_Institution

ICT, R. Inst. of Technol. (KTH), Stockholm, Sweden

fYear

2011

fDate

15-18 May 2011

Firstpage

530

Lastpage

533

Abstract

This paper briefly analyses the noise, bandwidth and linearity performance advantage of nanometer CMOS current- mode circuits compared to their voltage-mode counterparts and proposes a new current-mode receiver front-end targeting low- power wideband wireless applications. The proposed 65nm CMOS current-mode receiver front-end comprises a current- mode LNA, and passive mixers, and covers all WiMAX/LTE bands from 700MHz to 5.8GHz. The front-end achieves an IIP3 of 5 dBm, NF of 3.7-5dB while consuming 2.8mW from a 0.9V power supply. The analysis and simulation results show that the current-mode techniques are very good candidates for wireless applications in low-voltage nanometer CMOS technologies.

Keywords

CMOS integrated circuits; UHF integrated circuits; current-mode circuits; integrated circuit noise; low-power electronics; microwave integrated circuits; radio receivers; WiMAX-LTE band; current-mode LNA; frequency 700 MHz to 5.8 GHz; low-power wideband wireless application; nanometer CMOS current- mode receiver front-end circuit; noise figure 3.7 dB to 5 dB; passive mixer; power 2.8 mW; size 65 nm; voltage 0.9 V; voltage-mode receiver front-end; CMOS integrated circuits; Gain; Linearity; Mixers; Noise; Noise measurement; Receivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2011 IEEE International Symposium on

Conference_Location

Rio de Janeiro

ISSN

0271-4302

Print_ISBN

978-1-4244-9473-6

Electronic_ISBN

0271-4302

Type

conf

DOI

10.1109/ISCAS.2011.5937619

Filename

5937619