• DocumentCode
    1987828
  • Title

    Impact of band non-parabolicity on the onset voltage in a nanowire tunnel field-effect transistor

  • Author

    Carrillo-Nunez, Hamilton ; Magnus, W. ; Vandenberghe, W.G. ; Soree, Bart ; Peeters, F.M.

  • Author_Institution
    Technopole de Chateau-Gombert, IM2NP, Marseille, France
  • fYear
    2013
  • fDate
    3-5 Sept. 2013
  • Firstpage
    93
  • Lastpage
    96
  • Abstract
    The phonon-assisted band-to-band tunneling (BTBT) current has been computed for a cylindrical nanowire tunneling field-effect transistor (TFET) with an all-round gate covering the source region. Although we have considered relatively thick wires, i.e. diameters ranging between 5 and 8 nm, we found that BTBT is considerably affected by the carrier confinement in the radial direction. Therefore, a self-consistent solution of the Schrödinger and Poisson equations must be carried out. For the latter, we have implemented a non-linear variational principle based on the modified local density approximation taking into account non-parabolic corrections for both conduction and valence bands. Our findings show not only that the confinement effects in nanowire TFETs have a stronger impact on the onset voltage of the tunneling current in comparison with their planar counterparts but also that the value of the onset voltage is overestimated when the valence band nonparabolicity is ignored.
  • Keywords
    Poisson equation; Schrodinger equation; conduction bands; field effect transistors; nanowires; valence bands; Poisson equation; Schrodinger equation; TFET; all-round gate; band nonparabolicity; carrier confinement; conduction band; confinement effects; cylindrical nanowire tunneling field-effect transistor; modified local density approximation; nonlinear variational principle; nonparabolic corrections; onset voltage; phonon-assisted band-to-band tunneling current; radial direction; size 5 nm to 8 nm; source region; valence band; Approximation methods; Electric potential; Logic gates; Poisson equations; Transistors; Tunneling; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on
  • Conference_Location
    Glasgow
  • ISSN
    1946-1569
  • Print_ISBN
    978-1-4673-5733-3
  • Type

    conf

  • DOI
    10.1109/SISPAD.2013.6650582
  • Filename
    6650582