A simple optimal parallel dictionary machine

A simple optimal systolic algorithm is proposed for VLSI dictionary machine implementation. Our design makes use of a dynamic, global tree rebalancing scheme to attain high system throughput. Our scheme is simple to implement and requires low sophistication in the design of processing nodes. Results from analysis and simulation show that our algorithm has optimal response time and achieves an average latency close to 1. This represents a significant improvement over many of the previous designs. Unlike most parallel dictionary machines, our approach requires no compression operations