Novel design of multiple negative-differential resistance (NDR) device in a 32nm CMOS technology using TCAD

Author

Sunhae Shin ; Kyung Rok Kim

Author_Institution

Sch. of Electr. & Comput. Eng., Ulsan Nat. Inst. of Sci. & Technol. (UNIST), Ulsan, South Korea

fYear

2013

fDate

3-5 Sept. 2013

Firstpage

316

Lastpage

319

Abstract

We propose a novel multiple negative differential resistance (NDR) device with the positive inclined tri-state voltage transfer characteristics (VTC) between drain and gate of 32nm n-type MOSFET based on gate-induced drain leakage (GIDL) enhanced off-state CMOS ternary inverter. The ultrahigh 1^st and 2^nd peak-to-valley current ratio (PVCR) over 10⁴ can be designed with high slope of inclined ternary VTC by increasing the GIDL effects.

Keywords

CMOS integrated circuits; MOSFET; invertors; technology CAD (electronics); CMOS technology; GIDL; NDR device; PVCR; TCAD; VTC; gate-induced drain leakage; multiple negative-differential resistance device; n-type MOSFET; off-state CMOS ternary inverter; peak-to-valley current ratio; positive inclined tri-state voltage transfer characteristics; size 32 nm; CMOS integrated circuits; CMOS technology; Inverters; Logic gates; MOSFET; Resistance; Tunneling; Negative differential resistance (NDR); gate-induced drain leakage (GIDL); peak-to-valley current ratio (PVCR); voltage transfer characteristics (VTC);

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on

Conference_Location

Glasgow

ISSN

1946-1569

Print_ISBN

978-1-4673-5733-3

Type

conf

DOI

10.1109/SISPAD.2013.6650638

Filename

6650638