DocumentCode
1989590
Title
Compact iterative hardware simulation model for Montgomery´s algorithm of modular multiplication
Author
de Macedo Mourelle, Luiza ; Nedjah, N.
Author_Institution
Dept. of Syst. Eng. & Comput., State Univ. of Rio de Janeiro, Brazil
fYear
2003
fDate
14-18 July 2003
Firstpage
3
Abstract
Summary form only given, as follows. Modular multiplication is the most dominant part of the computation performed in public-key cryptography systems. In such systems the operation is time consuming for large operands. We examine the characteristics of yet another architecture to implement modular multiplication using the fast Montgomery algorithm. An experimental Montgomery modular multiplier prototype is described and simulated. The simulation results are presented.
Keywords
computational complexity; digital simulation; public key cryptography; simulation; software prototyping; Montgomery algorithm; iterative hardware simulation model; modular multiplication; public-key cryptography systems; Computational modeling; Computer architecture; Hardware; Iterative algorithms; Public key cryptography; Systems engineering and theory; Virtual prototyping;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Systems and Applications, 2003. Book of Abstracts. ACS/IEEE International Conference on
Conference_Location
Tunis, Tunisia
Print_ISBN
0-7803-7983-7
Type
conf
DOI
10.1109/AICCSA.2003.1227440
Filename
1227440
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