DocumentCode :
1989820
Title :
Design and analysis of a switched-capacitor-based peak detector
Author :
Zhang, Ming ; Llaser, Nicolas ; Mathias, Hervé
Author_Institution :
IEF, Univ. of Paris XI, Paris, France
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
1001
Lastpage :
1004
Abstract :
In this paper, a CMOS peak detector is proposed. The proposed peak detection is based on signal´s slope variation and it can be easily exploited for positive as well as negative peak detection. Besides it can also be used for multiple peak detection without needing resetting operation, making the circuit implementation quite simple. A switched-capacitor-based (SC-based) implementation is given along with performance analysis based on functional as well as analytical model. The developed analysis gives an insight into the potential performance as well as a design guide to reach the desired target. To have a relative error less than 1 %, the frequency ratio of sampling signal to input signal should be over 22. The proposed peak detector´s operation is confirmed by experimental results from Anadigm FPAA developing board.
Keywords :
CMOS integrated circuits; field programmable analogue arrays; peak detectors; switched capacitor networks; Anadigm FPAA developing board; CMOS peak detector; frequency ratio; negative peak detection; relative error; sampling signal; signal slope variation; switched-capacitor-based peak detector; Accuracy; Clocks; Delay; Detectors; Field programmable analog arrays; Frequency measurement; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
ISSN :
0271-4302
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
Type :
conf
DOI :
10.1109/ISCAS.2011.5937737
Filename :
5937737
Link To Document :
بازگشت