DocumentCode
1989963
Title
Monitoring of Switching Activity and Transition Times of Clock Signals in SoC Cells by Estimation of the Mean Value of IDD Current
Author
Dziurdzia, P.
Author_Institution
Department of Electronics, the AGH University of Science and Technology, E-mail: dziurdzi@agh.edu.pl
fYear
2005
fDate
19-21 Dec. 2005
Firstpage
747
Lastpage
750
Abstract
In the paper an idea of monitoring of System on Chips operation by estimation of the mean value (MV) of IDD current (IDDMV ) in SoC cells is shown. A special monitoring unit of the MV of the IDD current is presented as well as results of simulations relating to monitoring of switching activity and transitions times of clock signals in exemplary SoC cells designed in 0.35μm technology. Following up of the MV of the IDD current in individual cells of a given SoC seems to be an universal way of testing of mixed circuits, leading in consequence to increased reliability and production yield.
Keywords
Circuit faults; Circuit testing; Clocks; Costs; Design for testability; Monitoring; Production; System-on-a-chip; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
Print_ISBN
0-7803-9339-2
Type
conf
DOI
10.1109/EDSSC.2005.1635384
Filename
1635384
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