A RNS Montgomery multiplication architecture

A novel algorithm and VLSI architecture for Residue Number System (RNS) Montgomery modular multiplication are presented in this paper. An analysis of binary-to- RNS and RNS-to-binary conversions along with the proposed RNS Montgomery multiplication reveals common datapaths and a unified add/multiply architecture is derived that supports all aforementioned operations in the same hardware. The proposed algorithm is fully executed in RNS and the cost of the input/output conversions is compensated by the speed up of operations due to the inherent parallelism of RNS. If used repeatedly, the proposed architecture supports modular exponentiation and modular inversion as well, thus forming an end-to-end alternative for cryptographic implementations.