• DocumentCode
    1990831
  • Title

    An open notation for memory tests

  • Author

    Offerman, Aad ; van de Goor, A.J.

  • Author_Institution
    Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
  • fYear
    1997
  • fDate
    11-12 Aug 1997
  • Firstpage
    71
  • Lastpage
    78
  • Abstract
    Historically many ways of expressing memory tests have been used, varying from the use of general purpose programming languages to special notations. A notation, originally introduced for march tests in 1990, has been adopted and extended by many researchers. This paper extends that notation, in a systematic and open way, to a memory test language which allows march tests, pseudo march tests, tests involving topological neighborhoods (to cover pattern sensitive faults), line mode tests, and pseudo random tests, to be expressed in a unified manner. The syntax and semantics facilitate the specification of memory tests in a compact and readable way. Most important, the open structure allows extensions to the notation when necessary. The notation presented in this paper is a sequel to an earlier much more confined notation
  • Keywords
    automatic test software; fault diagnosis; integrated circuit testing; integrated memory circuits; line mode tests; march tests; memory tests; open structure; pattern sensitive faults; pseudo march tests; pseudo random tests; test language; topological neighborhoods; Computer architecture; Computer languages; Fault detection; Legged locomotion; Operational amplifiers; Semiconductor device testing; Semiconductor memory; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Technology, Design and Testing, 1997. Proceedings., International Workshop on
  • Conference_Location
    San Jose, CA
  • ISSN
    1087-4852
  • Print_ISBN
    0-8186-8099-7
  • Type

    conf

  • DOI
    10.1109/MTDT.1997.619398
  • Filename
    619398