An FPGA-based custom coprocessor for automatic image segmentation applications

Author

Gent, Greg J. ; Smith, Scott R. ; Haviland, Regina L.

Author_Institution

Dept. of Electr. Eng., Southern Illinois Univ., Edwardsville, IL, USA

fYear

1994

fDate

10-13 Apr 1994

Firstpage

172

Lastpage

179

Abstract

We describe a customized computing platform we are developing to accelerate a computer vision application. An FPGA-based coprocessor solution is derived which accelerates most of the compute-intensive calculations of a template deforming image segmentation algorithm. Design issues are identified and performance results reported. The results are parameterized so that alternative solutions can be evaluated according to technological advances. We discuss how implementing such a design with available reconfigurable logic platforms can be a worthwhile tool for the development of customized FPGA-based computing solutions

Keywords

computer vision; image segmentation; logic arrays; performance evaluation; reconfigurable architectures; special purpose computers; systolic arrays; FPGA-based custom coprocessor; automatic image segmentation applications; computer vision application; customized computing platform; performance results; reconfigurable architecture; reconfigurable logic platforms; systolic array; technological advances; Acceleration; Algorithm design and analysis; Application software; Computer vision; Coprocessors; Field programmable gate arrays; Image segmentation; Logic arrays; Logic design; Systolic arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

FPGAs for Custom Computing Machines, 1994. Proceedings. IEEE Workshop on

Conference_Location

Napa Valley, CA

Print_ISBN

0-8186-5490-2

Type

conf

DOI

10.1109/FPGA.1994.315610

Filename

315610