A SEC-BED-DED code with byte plus bit error detection

Author

Dunning, L.A.

Author_Institution

Dept. of Comput. Sci., Bowling Green State Univ., OH, USA

fYear

1994

fDate

15-17 June 1994

Firstpage

208

Lastpage

211

Abstract

A code is presented which is designed to protect a 64 bit word, consisting of 8 bytes of 8 bits each, against both byte errors and single bit errors occurring in computer memories. Two check bytes are appended to give an overall length of 80 bits. The code then provides the often studied SEC-BED-DED level of error protection; that is, single error correction, byte error detection and double error detection are available simultaneously. In addition, the code detects a byte error together with a single random error occurring concurrently in another byte. Some implementation issues such as systematic versus separable encoding are considered.<>

Keywords

encoding; error detection codes; fault tolerant computing; SEC-BED-DED code; byte error detection; byte errors; byte plus bit error detection; computer memories; double error detection; encoding; error protection; single bit errors; single random error; Application software; Bismuth; Computer errors; Computer science; Encoding; Error correction; Error correction codes; Galois fields; Parity check codes; Protection;

fLanguage

English

Publisher

ieee

Conference_Titel

Fault-Tolerant Computing, 1994. FTCS-24. Digest of Papers., Twenty-Fourth International Symposium on

Conference_Location

Austin, TX, USA

Print_ISBN

0-8186-5520-8

Type

conf

DOI

10.1109/FTCS.1994.315640

Filename

315640