DocumentCode
1991585
Title
Design of a Multistage Amplifier with High Gain and Wide Bandwidth Performance
Author
Benqiang Lv ; Xiaohong Peng ; Zhiding Zhu ; Xiaoqing Li ; Yong Hu ; Yunkang Liu
Author_Institution
VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China
fYear
2012
fDate
27-30 May 2012
Firstpage
1
Lastpage
4
Abstract
A high performance design of a three-stage amplifier is presented in this paper using the Impedance Adapting Compensation (IAC). The circuit is designed in 0.35 μm CMOS technology with 3.3V voltage power supply. When driving a 150 pF capacitive load, this amplifier achieves as high as 144dB dc gain,7.44MHz gain-bandwidth product (GBW) ,60° phase margin(PM),1.26V/us slew rate (SR) and 0.95mW power dissipation. This work provides a higher dc gain and wider GBW compared to other multistage amplifiers.
Keywords
CMOS analogue integrated circuits; compensation; radiofrequency amplifiers; CMOS technology; DC gain; IAC; bandwidth 7.44 MHz; capacitance 150 pF; capacitive load; gain-bandwidth product; impedance adapting compensation; multistage amplifier design; phase margin; power 0.95 mW; power dissipation; power supply; size 0.35 mum; slew rate; voltage 3.3 V; Bandwidth; Capacitance; Gain; Impedance; Simulation; Topology; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
Engineering and Technology (S-CET), 2012 Spring Congress on
Conference_Location
Xian
Print_ISBN
978-1-4577-1965-3
Type
conf
DOI
10.1109/SCET.2012.6342079
Filename
6342079
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