DocumentCode :
1991591
Title :
On codeword testing of two-rail and parity TSC checkers
Author :
Reddy, S.M. ; Pomeranz, I. ; Jain, R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear :
1994
fDate :
15-17 June 1994
Firstpage :
116
Lastpage :
125
Abstract :
We propose a method to test totally self-checking (TSC) two-rail and parity checkers to detect multiple faults using codewords as test patterns. Earlier methods that considered multiple line stuck-at faults in TSC checkers proposed solutions requiring the use of non-code inputs. The disadvantage of using non-code inputs to test a checker is that if the checker is integrated into the circuit being monitored, then special additional hardware is necessary to generate such inputs. Hardware to generate noncodeword tests is not required by the proposed procedure. Even though we have shown that the method proposed is applicable to multiple line stuck-at, multiple stuck-open, gate and path delay faults, in this paper we report the details for multiple line stuck-at faults only.<>
Keywords :
circuit reliability; codes; logic circuits; logic testing; codeword testing; codewords; gate delay faults; multiple faults; multiple line stuck-at faults; multiple stuck-open; parity TSC checkers; path delay faults; test patterns; totally self-checking checkers; two-rail TSC checkers; Automatic testing; Circuit faults; Circuit testing; Cities and towns; Delay; Electrical fault detection; Fault detection; Fault diagnosis; Hardware; Monitoring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Fault-Tolerant Computing, 1994. FTCS-24. Digest of Papers., Twenty-Fourth International Symposium on
Conference_Location :
Austin, TX, USA
Print_ISBN :
0-8186-5520-8
Type :
conf
DOI :
10.1109/FTCS.1994.315651
Filename :
315651
Link To Document :
بازگشت