DocumentCode
1992053
Title
The application of Virtual JTAG technology in FPGA design and debugging
Author
Zou, Hong ; Huang, Jiye ; Gao, Mingyu
Author_Institution
Sch. of Electron. & Inf., Hangzhou Dianzi Univ., Hangzhou, China
fYear
2011
fDate
16-18 Sept. 2011
Firstpage
2637
Lastpage
2640
Abstract
With the increased complexity of FPGA, the process of debugging and verifying is to become the key portion of the FPGA design procedure. By concluding the applications of Virtual JTAG technology in an actual project, this paper has provided some ideas about how to use Virtual JTAG technology to do logical design and board-level debug. Facts have proved that the means based on Virtual JTAG and Tcl/Tk can quicken the schedules and improve the accuracy of debug greatly.
Keywords
field programmable gate arrays; logic design; FPGA debugging; FPGA design; board-level debug; field programmable gate arrays; logical design; virtual JTAG technology; virtual joint test action group technology; Debugging; Field programmable gate arrays; Light emitting diodes; Probes; Random access memory; Registers; Software; FPGA; Tcl/Tk; Virtual JTAG;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Control Engineering (ICECE), 2011 International Conference on
Conference_Location
Yichang
Print_ISBN
978-1-4244-8162-0
Type
conf
DOI
10.1109/ICECENG.2011.6057934
Filename
6057934
Link To Document