DocumentCode :
1992623
Title :
GPU-enabled parallel processing for image halftoning applications
Author :
Trager, Barry ; Chai Wah Wu ; Stanich, Mikel ; Chandu, Kartheek
Author_Institution :
IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
1528
Lastpage :
1531
Abstract :
Programmable Graphics Processing Unit (GPU) has emerged as a powerful parallel processing architecture for various applications requiring a large amount of CPU cycles. In this paper, we study the feasibility for using this architecture for image halftoning, in particular implementing computationally intensive neighborhood halftoning algorithms such as error diffusion and Direct Binary Search (DBS). We show that it is possible to deliver very high performance even for high speed printers.
Keywords :
graphics processing units; image processing; parallel architectures; printers; CPU cycles; GPU-enabled parallel processing; computationally intensive neighborhood halftoning algorithms; direct binary search; error diffusion; high speed printers; image halftoning applications; parallel processing architecture; programmable graphics processing unit; Arrays; Graphics processing unit; Kernel; Parallel processing; Pixel; Satellite broadcasting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
ISSN :
0271-4302
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
Type :
conf
DOI :
10.1109/ISCAS.2011.5937866
Filename :
5937866
Link To Document :
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