Analyzing the influence of voltage scaling for soft errors in SRAM-based FPGAs

The susceptibility of SRAM-based FPGAs to soft errors has shown to increase with technology scaling due to the reduction of transistor size and reduced voltage supply. This work presents the actual impact of voltage reductions in the vulnerability of SRAM-based FPGAs to neutron-induced soft errors in terms of static and dynamic cross-sections. Experimental results under neutron radiation exposure show that for a 45nm SRAM-based FPGA, a 19% reduction in the VDD supply voltage can result in a 92% higher cross-section.