DocumentCode :
1992711
Title :
A harmonic-suppressed regenerative divide-by-5 frequency divider for UWB applications
Author :
Fu, Haipeng ; Cai, Deyun ; Ren, Junyan ; Li, Wei
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
1544
Lastpage :
1547
Abstract :
A harmonic-suppressed regenerative divide-by-5 frequency divider is proposed. Incorporating the proposed quadrature-input regenerative divide-by-2 divider (QIRD), the divide-by-5 divider suppresses the output harmonic effectively. The divide-by-5 divider improves the quadrarture phase accuracy at the output. Compared with conventional dividers, the divider achieves an output I/Q phase sequence that is tracked with the input I/Q phase sequence. The design is fabricated in TSMC 0.13-um CMOS and operated at 1.2 V. While locked at 8.6 GHz, the divide-by-5 divider achieves a minimum unwanted sideband rejection of -38 dBc.
Keywords :
CMOS integrated circuits; field effect MMIC; frequency dividers; ultra wideband technology; I-Q phase sequence; QIRD; TSMC CMOS technology; UWB applications; frequency 8.6 GHz; harmonic-suppressed regenerative divide-by-5 frequency divider; quadrarture phase accuracy; quadrature-input regenerative divide-by-2 divider; size 0.13 mum; voltage 1.2 V; Accuracy; Amplitude modulation; Harmonic analysis; Mixers; OFDM; Power harmonic filters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
ISSN :
0271-4302
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
Type :
conf
DOI :
10.1109/ISCAS.2011.5937870
Filename :
5937870
Link To Document :
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