DocumentCode :
1993135
Title :
Binary Access Memory: An optimized lookup table for successive approximation applications
Author :
Hershberg, Benjamin ; Weaver, Skyler ; Takeuchi, Seiji ; Hamashita, Koichi ; Moon, Un-Ku
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
1620
Lastpage :
1623
Abstract :
An optimized memory structure, Binary Access Memory (BAM), is presented for successive approximation applications that employ an error correction lookup table. Unlike true random-access memory, the probability of different codes occurring in a binary successive approximation access pattern is not uniformly distributed. BAM exploits this fact in several ways to reduce the number of sub-block switches, the average and worst-case access latency, and power consumption compared to a conventional SRAM lookup table. A simple technique for using BAM in an asynchronous successive approximation design is also presented.
Keywords :
SRAM chips; table lookup; access latency; asynchronous successive approximation design; binary access memory; error correction lookup table; sub-block switches; true random-access memory; Approximation methods; Binary trees; Calibration; Decoding; Error correction codes; Random access memory; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
ISSN :
0271-4302
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
Type :
conf
DOI :
10.1109/ISCAS.2011.5937889
Filename :
5937889
Link To Document :
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