Title :
Low-complexity FPGA implementation of compressive sensing reconstruction
Author :
Stanislaus, J.L.V.M. ; Mohsenin, Tinoosh
Author_Institution :
Dept. of Comput. Sci. & Electr. Eng., Univ. of Maryland, Baltimore, MD, USA
Abstract :
Compressive sensing (CS) is a novel technology which allows sampling of sparse signals under sub-Nyquist rate and reconstructing the image using computational intensive algorithms. Reconstruction algorithms are complex and software implementation of these algorithms is extremely slow and power consuming. In this paper, a low complexity architecture for the reconstruction of compressively sampled signals is proposed. The algorithm used here is Orthogonal Matching Pursuit (OMP) which can be divided into two major processes: optimization problem and least square problem. The most complex part of OMP is to solve the least square problem and a scalable Q-R decomposition (QRD) core is implemented to perform this. A novel thresholding method is used to reduce the processing time for the optimization problem by at least 25 %. The proposed architecture reconstructs a 256-length signal with maximum sparsity of 8 and using 64 measurements. Implementation on Xilinx Virtex-5 FPGA runs at two clock rates (85 MHz and 69 MHz), and occupies an area of 15% slices and 80% DSP cores. The total reconstruction for a 128-length signal takes 7.13 μs which is 3.4 times faster than the state-of-art-implementation.
Keywords :
compressed sensing; field programmable gate arrays; least squares approximations; optimisation; signal reconstruction; CS; DSP cores; OMP; QRD core; Xilinx Virtex-5 FPGA; compressive sensing reconstruction; computational intensive algorithms; frequency 69 MHz; frequency 85 MHz; image reconstruction; least square problem; optimization problem; orthogonal matching pursuit; scalable Q-R decomposition core; signal reconstruction; software implementation; sparse signal sampling; subNyquist rate; thresholding method; time 7.13 mus; Compressed sensing; Computer architecture; Field programmable gate arrays; Hardware; Image reconstruction; Indexes; Matching pursuit algorithms;
Conference_Titel :
Computing, Networking and Communications (ICNC), 2013 International Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4673-5287-1
Electronic_ISBN :
978-1-4673-5286-4
DOI :
10.1109/ICCNC.2013.6504167