Title :
High speed eight-parallel mixed-radix FFT Processor for OFDM systems
Author :
Kim, Eun Ji ; Sunwoo, Myung Hoon
Author_Institution :
Sch. of Electr. & Comput. Eng., Ajou Univ., Suwon, South Korea
Abstract :
This paper presents a novel eight-parallel 128/256-point mixed-radix multi-path delay commutator (MRMDC) FFT processor for orthogonal frequency-division multiplexing (OFDM) systems. The proposed FFT architecture can provide a higher throughput rate and low hardware complexity by using an eight-parallel data-path scheme, a multi-path delay commutator structure and an efficient scheduling scheme of complex multiplications. Using the modified radix-4 butterfly unit which can perform one radix-4 butterfly or two radix-2 butterflies, the proposed FFT processor can provide 128 and 256-point FFT computations. The proposed FFT processor has been designed and implemented with the 90nm CMOS technology. The proposed eight-parallel FFT processor can provide a throughput rate of up to 27.5Gsample/s at 430MHz.
Keywords :
CMOS integrated circuits; OFDM modulation; commutators; delays; digital arithmetic; fast Fourier transforms; CMOS technology; FFT processor; OFDM systems; high speed eight-parallel mixed-radix FFT processor; mixed-radix multipath delay commutator; multi-path delay commutator structure; orthogonal frequency-division multiplexing; Computer architecture; Delay; Discrete Fourier transforms; Hardware; OFDM; Pipelines; Throughput;
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
DOI :
10.1109/ISCAS.2011.5937905